Electronics Packaging Engineering

In the wacky world of electronics manufacturing engineering, we're always chit-chatting about three big boys in the game: electronics packaging technology, electronics assembly technology, and electronics assembly technology (say whaaat?). They may sound like tongue twisters, but they actually all belong to the same family of electronic packaging engineering technology, just with different focuses. It's like saying you have siblings who are all in the same family, but one is into sports, the other is into art, and the last one is into making dad jokes - same DNA, but different interests.

What is electronic packaging engineering? It refers to the technology of transforming electronic circuits into electronic products. So, electronic packaging engineering is basically like a fancy wrapping paper for electronic circuits. According to the product characteristics of the package and the technology used, electronic packaging engineering is generally divided into four stages: level 0 packaging, level 1 packaging, level 2 packaging and level 3 packaging.

Level 0 package, that is, the baby of chip packaging! It's like giving birth to a chip - all naked and exposed. The output is a bare chip (Die), its manufacturing technology for the semiconductor technology.

Let's talk about Level 1 packages - we're not talking about your latest online shopping delivery here! No no, we're talking about component-level packaging, the stuff that makes those semiconductor package devices like DIP, PLCC, QFP, BGA, QFN (to name a few!). Those belong to the level 1 package, the manufacturing technology for semiconductor packaging technology, such as lead bonding, flip-flop soldering.

Level 2 package, that is, the printed circuit board level package, the output for the printed circuit board assembly (Printed-Circuit Board Assembly, PCBA), the manufacturing technology for electronic assembly technology, such as wave soldering, reflow soldering, riveting, crimping and so on.

Level 3 packaging, i.e. system level packaging, the output is electronic products, and its manufacturing technology is backplane and cable connection. According to the above division, we can easily define the electronic assembly technology and assembly technology.

Usually referred to as electronic assembly technology actually includes 2-level packaging and 3-level packaging, so we can define it as the technology of interconnecting electronic components through substrates, backplanes and cables.

Electronic assembly technology usually refers to 2-level packaging, so it can be defined as the technology of mounting semiconductor chips and electronic components on substrates, including surface assembly technology (SMT) and micro-assembly technology.

It should be noted that with the rapid development of electronic information technology and the semiconductor industry, a variety of new applications such as smartphones, the Internet of Things (IoT), self-driving cars, 5G communications, AR/VR, and Artificial Intelligence (AI) continue to emerge, prompting semiconductor IC process sizes to become even smaller and enter the post-Moore era. As the IC manufacturing process is very close to the physical limits of the process, it is prompting the convergence of semiconductor IC technology and printed circuit and mounting technology to seek new solutions, which will change the content and scope of the interconnect hierarchy.